The present invention relates to charge pumps. A charge pump is a circuit which may be switched to output a current pulse. Charge pumps may be used in sample and hold systems, particularly in sampled data systems such as a phase-locked loop (PLL). The present invention is particularly suitable for use in a PLL employed as a local oscillator in a mobile wireless communication system such as a mobile telephone where low-power, high-speed circuits are needed.
A known circuit for a charge pump 1 is illustrated in FIG. 1. This charge pump uses a current mirror including a reference current source 2 to supply a reference current to a diode-connected logging transistor 3, the gate of which is connected to the gate of a mirror transistor 4 so that an image of the reference current flows through the mirror transistor 4.
The drain of the mirror transistor 4 is connected through a first diode 5 to the output terminal 6 and through a second diode 7 to the drain of a switching transistor 8. The gate of the switch transistor 8 is supplied with a switching signal for switching the output of the charge pump at the output terminal 6. When the switching transistor 8 is switched on (by the switching signal going low), it sinks the output current from the mirror transistor 4 of the current mirror. When the switching transistor 8 is switched off (by the switching signal going high), the mirror transistor 4 drives a negative current at the output terminal 6.
However, the charge pump 1 illustrated in FIG. 1 has a high power consumption, because even when the charge pump 1 is switched off current flows through the mirror transistor 4 and the switch transistor 8. This is undesirable, particularly in a battery-operated circuit where efficiency is important. In use, the charge pump 1 is combined with another charge pump (not shown) for supplying a positive current pulse to the output terminal 6. In this case, the circuit of charge pump 1 also suffers from poor output current matching between the two charge pumps as the voltage range at the output terminal is traversed due to Early Effect in the mirror transistors.
FIG. 2 illustrates a charge pump 9 having an improved efficiency over the charge pump 1 of FIG. 1. The charge pump 9 is again based on a current mirror including a reference current source 10 supplying a reference current to the drain of a diode-connected logging transistor 11, the gate of which is connected to the gate of a mirror transistor 12 to mirror an image of the reference current through the mirror transistor 12.
To provide switching, a series switch transistor 13 is connected in series with the mirror transistor 12 between the source of the mirror transistor 12 and the supply rail. A switching signal is supplied to the gate of the switching transistor 13 to switch the output current flowing through the mirror transistor 12. A dummy switch transistor 14 is connected in series with the logging transistor 11 to bias the logging transistor 11 by the same voltage as the mirror transistor 12 and hence allow proper operation of the current mirror.
A cascode transistor 15 is connected in series between the drain of the mirror transistor 12 and the output terminal 16. The cascode device minimises Early Effect in the mirror transistor 12 because changes in the voltage at the output terminal 16 have little effect on the voltage at the drain of the mirror transistor 12.
However, the charge pump 9 illustrated in FIG. 2 has two limitations. Firstly, the source of the mirror transistor 12 is uncontrolled during and after the on-to-off transition. Initial switch-off is fast, but becomes progressively slower as the charge on the source node of the mirror transistor 12 drains through the mirror transistor 12 into the source of the cascode transistor 15. After the current through the cascode transistor 15 and the mirror transistor 12 has been switched substantially off, any residual charge leaks onto the output terminal as a residual leakage current which is undesirable. When the charge pump 9 is used in a PLL, such leakage current manifests itself as a series of unwanted harmonic spurs related to the comparison frequency. This becomes particularly problematic at high temperatures and at low comparison frequencies.
Secondly, when the charge pump 9 of FIG. 2 is implemented in a typical CMOS technology, switching transients are injected into the surrounding circuitry via the substrate (and/or well for the PMOS devices) due to the source and drain diffusion capacitance.
Typically, a pair of charge pumps are used to output a current of positive and negative polarity, respectively. One of the charge pumps has the configuration illustrated in FIG. 1 or 2 to output a current pulse of negative polarity the other charge pump (not shown) has the same configuration but implemented using PMOS transistors instead of NMOS transistors and is connected to the output terminal to output a current of positive polarity.
Known charge pump pairs when used to control a sample data system suffer from the problem that comparison related spurii occur particularly during high-speed operation. When a charge pump pair is used in a PLL, for example, the result is that the settle time has to be increased to minimise spurii.
According to a first aspect of the present invention, there is provided a charge pump pair comprising two charge pumps switchable to output a current of positive and negative polarity, respectively, wherein the charge pumps are relatively scaled to equalise at least one of: the rise time constants of the transient outputs of the charge pumps when switched on; and the fall time constants of the transient outputs of the charge pumps when switched off.
The first aspect of the present invention serves to reduce the generation of comparison related spurii particularly for operation of high speeds. This aspect of the invention is based on an appreciation that the major contribution to comparison related spurii is the mismatch between the charge areas of the transients of the output current pulses from the two charge pumps. For example, FIG. 3 illustrates by the continuous line 17 and the dotted line 18 the magnitudes of positive and negative current pulses, respectively, when unmatched charge pumps are switched on at time t1 and switched off at time t2. As the negative current pulse has a faster rise time and a slower fall time, the charge area of the negative current pulse is less than the charge area of the positive current pulse by an amount equal the total of the shaded areas 19 and 20. However, by relatively scaling the charge pump according to the first aspect of the present invention the rise and fall times may be matched, hence equalising the charge areas of the positive and negative current pulses.
The first aspect of the present invention may be applied to a charge pump pair wherein each charge pump comprises a current mirror including a reference current source, a logging transistor circuit supplied with a reference current from the reference current source and a mirror transistor circuit, the control input of the mirror transistor circuit being connected to the control input of the logging transistor circuit to mirror an image of the reference current to the output of the mirror transistor circuit as the output of the charge pump and a clamp circuit switchable to selectively clamp the control input of the mirror transistor circuit to switch the output of the mirror transistor circuit on and off.
The logging transistor circuits and mirror transistor circuits of the two charge pumps may be formed by field-effect transistors. In that case, to equalise the rise time constants of the transients of the charge pumps when switched on the reference currents of the respective current mirrors of the two charge pumps are relatively scaled by the same ratio as the capacitances of the respective control inputs of the two charge pumps. This is because the rise time constant is governed by the charging of the control input (eg. gate) of the respective mirror transistor circuits. Consequently, the rise time constants are proportional to the ratio of the respective reference currents to the input capacitances of the respective mirror transistor circuits.
Similarly, to match the fall time constants of the transient outputs of the charge pumps when switched off the resistances of the respective clamp circuits of the two charge pumps are relatively scaled by the inverse ratio of the capacitances of the respective control inputs of the mirror transistor circuits of the two charge pumps. This is because the fall time constant is governed by the discharge of the control input (eg. gate) of the mirror transistor circuit through the clamp circuit. Consequently, the fall time constants are inversely proportional to the product of the input capacitances of the respective mirror transistor circuits and the respective resistances of the clamp circuits.
The first aspect of the present invention could be applied with the charge pump pair being implemented using any transistor technology. For example if bipolar transistors were used, the relative scaling of the mirror transistor circuits would be achieved by relatively scaling of the length of the emitter leg.
Preferably, the mirror transistor circuits of the two charge pumps are relatively scaled to have the same output current density. When the current mirrors of the two charge pumps are implemented by field-effect transistors in which the mirror transistor circuits have the same channel length, this may be achieved by relatively scaling the ratio of the channel widths of the transistors forming the respective mirror transistor circuits of the two charge pumps by the ratio of the conduction factors of the respective semiconductors used to make the transistors of the two charge pumps.
Preferably, the logging transistor circuits of the respective current mirrors of the two charge pumps are relatively scaled to equalise the magnitude of the output currents mirrored to the respective mirror transistor circuits of the two charge pumps.
Second and third aspects of the present invention relate to the circuit of a single charge pump. In particular they relate to the charge pump in a configuration comprising: a current mirror having a logging transistor circuit supplied with a reference current and a mirror transistor circuit, the control input of the mirror transistor circuit being connected to the control input of the logging transistor circuit to mirror an image of the reference current to the mirror transistor circuit as the output of the charge pump; and a clamp circuit connected to the control input of the mirror transistor circuit and switchable off and on to clamp the mirror transistor circuit on and off.
However, in such a circuit, when the clamp circuit is switched on to clamp the mirror transistor circuit off, the reference current is still flowing through the clamp transistor circuit. This causes a small voltage drop across the clamp transistor circuit equal to the product of the reference current and the drain-source resistance Rds(on) of the clamp transistor circuit when conducting. Although this voltage is small, it causes a small residual current to flow in the mirror transistor circuit in its off state.
According to the second aspect of the present invention, the charge pump additionally comprises a series transistor circuit connected in series with the mirror transistor circuit and switchable on and off synchronously with the clamp transistor circuit being switched on and off, the series transistor circuit when switched off providing a bias voltage which assists in clamping the mirror transistor circuit off. By using the series transistor circuit to provide a bias voltage which assists in clamping the mirror transistor circuit off, it is possible to prevent the residual current from flowing in the mirror transistor circuit in its off state.
Preferably, the charge pump includes a switching circuit arranged to switch the clamp transistor circuit and the mirror transistor circuit synchronously.
Desirably, the switching circuit is arranged to switch the series transistor circuit after switching the clamp transistor circuit, for example by supplying the switching signal for the clamp transistor circuit also to the series transistor circuit through a delay element, such as a NOT gate if the clamp transistor circuit is controlled by an inverted logic switching signal. Switching the series transistor circuit after the clamp transistor circuit ensures proper switching of the charge pump by the clamp transistor circuit without the generation of additional currents during the switching transients.
The reverse bias is determined by the voltage drop across the clamp transistor circuit in its non-conducting off state relative to the voltage drop across the series transistor circuit in its conducting on state.
Preferably, the charge pump further comprises a dummy transistor circuit connected in series with the logging transistor circuit to bias the logging transistor circuit by the same voltage as the series transistor circuit biases the mirror transistor circuit when switched on.
Desirably, the dummy transistor circuit is scaled relative to the clamp transistor circuit to provide a reverse bias voltage to the control input of the mirror transistor circuit for example by providing the dummy transistor circuit with a larger drain-source resistance Rds(on) than the transistor circuit.
To minimise charge depletion from the hold element connected to the output terminal (for example an external loop filter in a PLL), the charge pump output conduction must drop to zero as fast as possible to prevent the hold element voltage from changing during the hold period. This can be achieved if the control input and source of the mirror transistor circuit are clamped together during the off period. The fall time constant is proportional to the product of the output resistance of the clamp transistor circuit in its on state and the input capacitance of the control input of the mirror transistor circuit.
A further problem is that Early Effect in the mirror transistor circuit causes the output current to change as the voltage range at the output terminal is traversed. This is undesirable because it alters the magnitude of the current pulse of the charge pump at different output voltages. When a pair of charge pumps are used to output negative and positive output currents, there is poor output current matching between the two charge pumps.
According to the third aspect of the present invention, the charge pump further comprises an operational amplifier circuit of which one input is connected to the line supplying the output of the mirror transistor circuit, the other input is connected to the line supplying the reference current to the logging transistor circuit and the output is connect to the control input of the logging transistor circuit.
The operational amplifier compensates for Early Effect. The output of the operational amplifier adjusts the control input of the logging transistor circuit to force the voltage appearing on the output of the mirror transistor circuit onto the line supplying the reference current to the logging transistor circuit, through the action of the positive feedback loop. As the logging transistor circuit is current-forced and the voltage on the line supplying the reference current is controlled to equal the voltage on the output line, the mirror transistor circuit always has the same operational conditions as the logging transistor circuit, so mirrors the same image of the reference current to the output of the charge pump whatever voltage at that output.
However, this circuit can suffer from a problem after the clamp circuit is switched on to clamp the mirror transistor circuit off. This involves lowering the voltage at the control input of the mirror transistor circuit. If the control input of the logging transistor circuit is directly connected to the control input of the mirror transistor circuit, then the voltage rises on the line supplying the reference current connected to the non-inverting input of the operational amplifier. This drives the output current of the operational amplifier upwards until it reaches a maximum saturated level. Whilst this does not prevent the switching charge pump from being switched off, it requires that the clamp circuit is able to sink a large current. It also significantly raises the power consumption of the charge pump as the operational amplifier is driven hard when the charge pump is off, this being particularly undesirable in the case of for battery operation.
To deal with this problem, the charge pump preferably further comprises isolation means for isolating the line between the output of the operational amplifier and the control input of the mirror transistor circuit from the control input of the logging transistor circuit when the clamp circuit is switched to clamp the mirror transistor circuit off.
For simplicity, it is preferred that the isolation means comprises a switch circuit switched synchronously with the switching of the clamp circuit. For example the switch circuit may be formed by a transistor circuit. If a switch circuit is provided, on switching on the switch circuit, a voltage transient is generated at the control input of the logging transistor circuit which feeds into the positive feedback loop of the operational amplifier. Such a transient can cause the output of the operational amplifier to oscillate. To solve this problem, the charge pump may further comprise the switch circuit is formed by a transistor circuit.
Preferably, a buffer amplifier of which the input is connected to the line between the output of the operational amplifier and the control input of the logging transistor circuit and the output is connected to the switch circuit, which may be scaled with a replica of the reference current.
The transistor circuits in the first to third aspects of the present invention are preferably each formed by a single transistor for simplicity. However, they could take other forms, for example, a plurality of parallel-connected transistors or other more complicated configurations.